CISC processors RISC processors
1 Complex Instruction Set Computer (CISC) processors has a bigger instruction set with many addressing modes.                             1.Reduced Instruction Set Computers (RISC) processors has a smaller instruction set with few addressing modes
2. It has to use a seperate micro-programming unit with a control memory to implement complex instructions.

 2. It has a hard-wired programmed-unit without acontrol memory, and seperate hardware to implement each and every instruction.
3. An easy compiler design 3. A complex compiler design.
4. The calculations are slower and precise 4The calculations are faster and precise
5. Decoding of instruction is  complex 5. Decoding of instruction is
6.The Execution time is very high. 6. It takes a very less execution time.
7. It frequently needs the external memory access to make calculations. 7.  Since it uses a hardwired model, its not often, to take the external memory access for calculations.
8. Pipelining does not function correctly here because of complexity in instructions. 8. Pipeling is not a  major problem and this option speeds up the processors.
9. These processors often stall because of pipelining problem. 9. Since the instructions are not complex, stalling is mostly reduced.
10. Code Expansion is not a problem in CISC processors. 10. Code expansion can be a problem in some cases in RISC processors.
11. Disc space is wasted. 11. Disc space is saved.
12. Used in low end applications such us Security systems, Home automation 12. Used in High end applications such us video processing, telecommunications, image processing